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IO363V

Ethernet Module; 200MB/sec Digital Bus <--> NetSilicon's Ethernet interface 'C6711 DSP; Virtex E FPGA

Overview | Features | Benefits | Layout | Block Diagram | User Manual

IO363V

Overview

The IO363V is a 'Stand-alone' Module that combines a TMS320C6711 DSP, a Xilinx FPGA and a NetSilicon ARM-chip with integrated MAC controller for connection to an Ethernet network. Typical applications for this Module will be low-cost, high-performance Radar systems, where the FPGA will do the I/O interfacing from/to the RF section; the DSP doing the FFT processing and the ARM-Core doing the data-manipulation and the control of the Ethernet/Internet connections.

The FPGA has plenty of spare resources and can be re-programmed via Comm-port (the 8-bit data parallel inter-processor ports of the 'C4x processor) and an EPLD to perform pre-processing of the converted data, control some of the external I/O pins or other customer specific requirements.

Key Features:

Single width module
NET-50 Ethernet Solution
16Mbytes SDRAM for the ARM Net50 processor
150MHz TMS320C6711 DSP
16 Mbytes SDRAM for the DSP.
8 Mbyte Flash
Dual-port Memory between the processors
Xilinx Virtex E XC300E-6 FPGA.
Two 200MB/sec Digital Bus Interfaces
Four Comm-Ports
TIM Global Connector
TIM Standard compatible
12 months warranty

Benefits

The IO363V is the first of it's kind. A Module which provides a unique path for connecting high-speed DSPs to the Internet for applications like Radar applications, Spectrum Analysers, Digital Radio and similar Telecom systems.
The IO363V is supported by either NetSilicon Linux or the NetOS to program the ARM sections of the Net-50 processor. The DSP is controlled by either Code Composer Studio or 3L Diamond RTOS.

Layout for the IO363V (PDF):
Layout for the IO363V

CLICK for Block Diagram (PDF):
Block diagram for IO363V

User Manual (PDF)

 

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