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ADC364

ADC Module; 4 Channels; 105MSPS @ 14bit; Xilinx Virtex II FPGA; 400MB/sec Digital Bus Interface;

Overview | Features | Benefits | Layout | Block Diagram

Overview

ADC364 offers a building block for scalable high-speed Analogue to Digital data collections starting from 4 channels and reaching as many as 32 channels by cascading eight ADC364s. The single width Module has four AD6645 from Analog Device Inc. and these are 14-bit ADC converters with a 105MSPS sampling rate. All necessary functions, including track-and-hold (T/H) and reference are included on the chip to provide a complete conversion solution. They are interfaced to a Xilinx Virtex FPGA that controls the ADC converters and also provide the data-route of the converted analogue signals.

The data are routed to four 16-bit 200MB/sec Digital Buses, using two 400MB/sec Digital Bus connectors and the control of the ADCs are done with the help of a Comm-Port (the 8-bit data parallel inter-processor ports of the 'C4x processor).

Key Features:

	Four 14-bit ADCs (AD6645) sampling up to 105 MHz.
	Single width module.
	Two 400MB/sec Digital Bus connectors.
	Four 20 MBytes/s communication ports.
	Low-jitter system clock.
	Xilinx Virtex-II FPGA (XC2V1000-4).
	On-board PROM (Xilinx XC18V04) loads up the default configuration into the FPGA
	50-Ohm analogue inputs and outputs, external triggers and clocks via MMBX (Huber and Suhner) connectors.
	User defined pins for external connections.
	Compatible with a wide range of '400MB/sec Digital Bus' modules.
	TIM standard compatible.
	12 month warranty

Benefits

	Ideal for flexible system architectures like IF Radar Sampling, Base-band Radar Sampling, Spectrum Analyzers, Digital Radio Receivers, Multi-channel Receivers and Cellular/PCS base stations.
	The XC2V1000 Xilinx FPGA has 1 million gates and we use approx. half a million for controlling the converters and rest can be used by the OEM customer for doing pre-processing on the data or for other custom controls.
	The ADC364 has more than 100 free I/O pins for either 'InterModule' communications or for custom applications/use.

Layout for the ADC364 (PDF):

CLICK for Block Diagram (PDF):

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